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rev.v6, 12 apr 2002. information provided in this data sheet is subject to change without notice. pg. 1 of 14 mindspeed tm technologies, inc. data sheet CX60083-15/-2a 10 gbps high gain limiting amplifier key features ? limiting amplifier ? integrated los and peak detect circuit ? wide bandwidth and high sensitivity ? compatible with dc- or ac-coupled input and output signals ? fully differential architecture ? optional single-ended input and/or output operation ? available in a 32-terminal, 5 mm square edquad tqfp or as dice applications ? fiber-optic communications (oc-48/oc-192) ? sonet/sdh test equipment ? data communications product description the CX60083 is a high-gain, wide-bandwidth, limiting amplifier ideal for use as a post-amplifier in fiber-optic receivers. with its 10ghz bandwidth, this amplifier has been optimized for data rates up to 10.7 gbps and has an input sensitivity (ber < 10 -10 ) of 5 mv, differential. it accepts both single-ended and differential inputs and may be either ac- or dc- coupled. with approximately 39 db of small signa l gain, this amplifier can limit input voltages at or above 5 mv p-p (single-ended) to an output voltage of 460 mv p-p (single-ended). an on-chip loss of signal (los) detection circuit with hysteresis provides an los output signal. a high-gain, on-chip, peak det ector provides a dc output signal that is linearly proportional to the input signal amplitude. this signal can be used for automatic gain contro l (agc) of preceding amplifier stages or a custom los network. high-impedance differential outputs and inputs are available for input voltage offset correction. the CX60083, as shown in figure 7, is available in a 32-terminal flat pack or as shown in figure 9 in die form. figure 1 is the system block diagram. figure 1. CX60083 system block diagram offinn datoutn offinp vth vthcap t i a supply voltage offoutp offoutn pkdetout pkdetdc losres los ac or dc coupled avalanche photodiode clock data recovery unit datainn datainp CX60083 los detect peak detect 10k datoutp see figure 3 for ac-coupled 50 ? ? 50 ? 5 ? 2k ? 2k ? 10k ?
CX60083-15/-2a, 10 gbps high gain limiting amplifier rev. v6, 12 apr 2002. information provided in this data sheet is subject to change without notice. pg. 2 of 14 mindspeed technologies, inc. signal amplification and termination the CX60083 is optimized to accept up to 10.7 gbps data on the 50 ? inputs datainp and datainn. the input signal is amplified 39 db up to approximately 460 mv pp (single-ended) and is limited to this value with any further input signal increase. data rates greater than 10.7 gbps (including 12.5 gbps) may be input but with reduced small signal gain. the outputs are available at the dataoutp and dataoutn pins. the outputs have an internal 50 ? impedance and are designed to drive a 50 ? load. when terminated in 50 ? , the outputs swing between approximately ?50 mv and approximately ?510 mv. the datainp and datainn inputs can be driven either differentially or single-ended, and can be dc-coupled or ac-coupled. each o f the differential inputs has a 50 ? resistor terminated to the vth terminal. in most cases vth is grounded. however, it may be necessary to connect vth to a dc potential to ensure the input signal does not exceed the maximum or minimum CX60083 peak input voltage. these requi rements are described in more detail in figure 4 and in the application note CX60083an1: input and output interface terminations. vthcap pr ovides for additional (optional) decoupling of vth. table 1 lists the CX60083 terminal name descriptions. table 1. terminal name descriptions terminal name terminal number description signal vthcap 2 vth decoupling dc datainp 4 high-speed input data (non-inverting polarity) rf (1) datainn 5 high-speed input data (inverting polarity) rf (1) vth 7 datain termination (input common mode voltage input when ac-coupled) power offinn 10 negative offset control input analog offinp 11 positive offset control input analog offoutp 15 offset sense output (non-inverting) analog offoutn 16 offset sense output (inverting) analog dataoutn 20 high-speed output data (inverting polarity) rf (1) dataoutp 21 high-speed output data (non-inverting polarity) rf (1) pkdetdc 27 peak detector dc reference dc pkdetout 28 peak detector output dc losres 29 loss of signal threshold control resistor dc los 30 loss of signal (active high) dc vee 1, 8, 17, 24, 25, 32 power supply power gnd 3, 6, 9, 12, 13, 14, 18, 19, 22, 23, 26, 31 ground power ep exposed paddle package or die backside dc (2) note 1: these are 50 ? matched terminals. note 2: the package or die backside should be well connected to ground using either conductive epoxy or solder. output terminations the outputs dataoutp and dataoutn can be either dc- or ac-coupled to the succeeding stage. for further details see application note CX60083 an1. offset sense and compensation differential output signals at dataoutp and dataoutn connect to pins offoutp and offoutn, respectively, via internal 10 k ? resistors. these pins can be used to reduce output offset that might produce pulse width distortion. the offset sense outputs indicate any dc of fset voltage between the differential outputs. they may be used in a feedback circuit to compensate for any internal voltage offset. the out put of the offset compensation circuit may be applied to one or both of the input offset compensation pins: offinp and offinn. output signal peak detection the on-chip peak detector generates a dc voltage on pkdetout, which is proportional to the input signal amplitude. the pkdetdc output is the dc reference voltage for the pkdetout output signal. the difference between the pkdetout and pkdetdc pins is a voltage, which i s
CX60083-15/-2a, 10 gbps high gain limiting amplifier rev. v6, 12 apr 2002. information provided in this data sheet is subject to change without notice. pg. 3 of 14 mindspeed technologies, inc. approximately linearly proportional to the input signal amplitude. the relationship of pkdetout-pkdetdc, as a function of the i nput signal amplitude, (differential, peak-to-peak) is illustrated in figure 2. figure 2. peak detector transfer function characteristics pkdetout - pkdetdc (mv) 0 200 400 600 800 1000 1200 0 20 40 60 80 100 120 140 160 180 data input amplitude (mv p-p differential) mv dc loss of signal the los terminal is an open collector output providing an active high signal indicating a loss of signal (los) condition. the l os terminal sinks 350 a when it is low (deasserted) and no current when it is high (asserted). it is possible to connect the los terminal to a supply voltage using an external resistor to establish a desired voltage logic level indicating los as described below. the on-chip los circuit has built in hysteresis. to use the los function approximately 200 ? needs to be connected between the losres pin and ground. los sinks 350 a when it is low (deasserted), and no current when it is high (asserted). it is an active high output. you can connect a resist or between 5 v or 3.3 v and the los pin. this can be used to establish output voltage levels as follows: for a high level of 3.3 v and a low level of approximately 0.0 v, the swing is 3.3 v. when the output is low (not asserted) it sinks 350 a. the values: 3.3 v/350 a is 9.4 k ? . consequently, putting a 9.53 k ? resistor between 3.3 v and the los terminal would give you a 3.3 v output when the signal is high and about 0.0 v when it is low.
CX60083-15/-2a, 10 gbps high gain limiting amplifier rev. v6, 12 apr 2002. information provided in this data sheet is subject to change without notice. pg. 4 of 14 mindspeed technologies, inc. figure 3. loss of signal (los) characteristic 0 5 10 15 20 25 30 35 40 45 0 50 100 150 200 250 300 350 400 450 losres ( ? ) input signal (mvpp, single-ended) vthreshold (1) vhysteresi s (2) note 1: with the los flag reset, vthreshold is defined as the input signal voltage, below which, the los flag becomes set. note 2: if los flag is set vhysteresis is defined as the input signal voltage above which the los flag becomes reset. input voltage range determination the input ac voltage in combination with the dc bias present at the datain pins should satisfy the input voltage range specific ations according to the following condition: the voltage present at the input pins of the limiting amplifier (datainp and/or datainn) needs to fall between -1.0 v and +0.25 v. from figure 1 it can be observed that the differential voltage present at the CX60083 data inputs is a combination of the voltage at vth and the output level of the preamplifier driving the CX60083 data inputs. figures 4a and 4b show the relationship between the tia output level and the vth reference level to the voltage present at the CX60083 data input pins when the input is either dc- (figure 4a) or ac- (figure 4b) coupled. (note the tia source level is vs when terminate d into a 50 ? load). figure 4a. CX60083 input value when dc-coupled ? tia driving stage output (vs) datainp/n ? CX60083 input 50 ? 50 ? transmission line vth datainn/p = vs v th 2 - 1.0 v datainn/p 0.25 v 50 ? 0.1 vth control voltage observe that if vth = 0 v (ground), then the datainp/n level is simply vs.
CX60083-15/-2a, 10 gbps high gain limiting amplifier rev. v6, 12 apr 2002. information provided in this data sheet is subject to change without notice. pg. 5 of 14 mindspeed technologies, inc. figure 4b. CX60083 input value when ac-coupled datainp/n ? CX60083 input 50 ? transmission line datainn/p = vth vs 50 ? - 1.0 v datainn/p 0.25 v 0.1 vth control voltage ? tia driving stage output (vs) 50 ? vth reference value determination referring to figures 4a and 4b, for a preamplifier output signal of less than 250 mv peak , vth can generally be connected to ground. if the input signal is greater than 250 mv peak (and less than 800 mv p-p ) then vth will need to be connected to a negative voltage reference, the level of which, is calculated so that the sum of the ac peak signal and the dc vth reference voltage ensures the voltage present at data inp and datainn input pins falls with the range -1.0 v and 0.25 v as shown in figures 4a and 4b. when driving the part with a single-ended input, the non-used CX60083 input terminal should be terminated in a manner similar t o the input being driven: if the driven input is dc-coupled to the preamplifier, the non-used input should be dc terminated with 50 ? . if the driven input is ac-coupled, then the non-used input should be ac-coupled to the 50 ? termination. the termination voltage needs to be a potential equal to the common mode voltage seen at the driven input terminal (so that the driving signal swings equally above and below the non-used i nput). when a dc reference is connected to vth, it should be decoupled with a good quality high frequency capacitor 10 nf (if possible, 0.1 f in parallel with 330 pf is suggested). for more detailed information on interfacing to the CX60083 please refer to application note CX60083 an1.
CX60083-15/-2a, 10 gbps high gain limiting amplifier rev. v6, 12 apr 2002. information provided in this data sheet is subject to change without notice. pg. 6 of 14 mindspeed technologies, inc. electrical specifications tables 2 through 5 list the CX60083 rf and dc electrical specifications, absolute maximum ratings and power requirements. table 2. rf electrical specifications (for die, see note 8) tcase = 0 c to +85 c, vee = ?5.2 v 5%, bit rate = 9.95328 gbps, input offset compensated for with dc servo loop and exposed paddle connected to ground. parameter min typical max unit operating temperature 0 ? 85 c input ac voltage, single-ended (1, 2) 5 ? 800 mv input high level (vih) voltage range (3) ?1.0 ? 0.25 v input low level (vil) voltage range (3) ?1.0 ? 0.25 v input offset voltage (without offset compensation) (4) ?5 0 5 mv output swing, single-ended (when limiting) 425 450 500 mv p-p absolute output voltage range, single-ended (when limiting) ?0.6 ? 0 v output rise/fall time (20% - 80%), input = 20 mv p-p differential (8) ? 28 35 ps small signal gain (single-ended to single-ended) (5, 7) 32 39 ? db small signal gain at 10 ghz (single-ended to single-ended) (5, 7) ? ? 40 db small signal gain variation (7) ?2 0 +2 db small signal 3 db bandwidth (7) 8.5 10.0 10.5 ghz input and output return loss (single-ended) 100 khz ? 5 ghz (6, 7) ? ? ?10 db input and output return loss (single-ended) 5 ghz ? 10 ghz (6, 7) ? ?10 ?5 db input and output return loss (single-ended) 10 ghz (6, 7) ? ?10 ? db output jitter (rms), input = 1600 mv p-p differential (8) ? 1.6 2.0 ps output jitter (rms), input = 10 mv p-p differential (8) ? 2.1 3.0 ps note 1: 1600 mv differential peak-to-peak input translates to 800 mv p-p for each signal (single-ended). see figure 5. note 2: output typically limits for inputs greater than 5 mv p-p single-ended. smaller and larger signals meeting the vih and vil specifications may be input, but performance will be reduced. note 3: signals exceeding 0.25v above ground but less than 0.5v above ground may be input, but performance will be reduced. note 4: end-of-life offset specification is 7 mv. for maximum sensitivity, a dc servo loop must be used (see application note CX60083 an2). note 5: unused input and output terminated 50 ? to ground. differential to differential gain is 6 db greater. note 6: return loss measured with packaged part mounted on a characterization board with 50 ? input and output traces and connectors. note 7: ac characteristics are established from characterization of packaged parts. note 8: while limited ac testing is done on each die, these characteristics are not guaranteed for die. figure 5. CX60083 differential input voltage definitions datainp 0.0 vid = [datainp-datainn] 1600 mv max. 800 mv max. datainn
CX60083-15/-2a, 10 gbps high gain limiting amplifier rev. v6, 12 apr 2002. information provided in this data sheet is subject to change without notice. pg. 7 of 14 mindspeed technologies, inc. table 3. dc signal electrical specifications tcase = 0 c to +85 c, vee = ?5.2 v 5%, bit rate = 9.95328 gbps parameter min typical max unit pkdetout ?2.4 ? ?1.3 v pkdetdc ? ?2.4 ? v losout ?2.3 ? +6 (1) v losres 50 ? 500 ? los assert/deassert 250 ns note 1: current sink output. refer to the los subsection for description of voltage behavior. table 4. absolute maximum ratings (no damage) symbol item min max units vee supply voltage ?7.0 +0.5 v datainp, datainn high speed input signal ?1.0 +0.5 v dataoutp, dataoutn high speed output signal ?1.0 +0.5 v offoutp, offoutn offset sense output ?2.0 +0.5 v offinp, offinn offset control input (1) ?2.0 +2.0 v tst storage temperature ?65 +150 c note 1: with vth connected to ground 1 v, the offset control input range is 5 v. table 5. power dc electrical specifications tcase = 0 c to +85 c, vee = ?5.2 v 5% symbol item min typical max units iee supply current ? 125 150 ma pdiss total power dissipation ? 650 825 mw
CX60083-15/-2a, 10 gbps high gain limiting amplifier rev. v6, 12 apr 2002. information provided in this data sheet is subject to change without notice. pg. 8 of 14 mindspeed technologies, inc. CX60083 applications diagram figure 6. CX60083 applications diagram vee gnd gnd gnd dataou tn dataou tp gnd vee vee gnd los losres pk d et out pk d et dc gn d vee offoutp offoutn gnd gnd gnd offinp offinn gnd CX60083 vth gnd gnd datain n datain p vthcap +5v 14.3k 150 .01 1.0 .01 1.0 .01 .01 1.0 .01 .01 1.0 1.0 .01 .01 1.0 .01 .01 1.0 .01 24 22 21 23 20 19 18 17 16 15 14 13 12 11 10 9 25 26 27 28 29 30 31 32 1 3 4 2 5 6 7 8 +5v 2 3 7 4 6 u1 - + vee (-5.2v) optional ac coupling. note 1. optional single-ended connection. note 2. 50 optional ac coupling. note 3. optional single-ended connection. note 3. 50 a l l resi stance val ues are i n ohms all capacitance values are in mircofarads optional peak detect circuit vee vee notes: 1. the input(s) may be ac-coupled to the pre-amplifier using a good high fr equency capacitor. 2. if dr iven single- ended by the pr e- amplifier , the unused input m ust be ter minated in 50 ohms. if a single- ended ac- coupled connection to the pr eamplifier , the unused input m ust be ac- coupled to a 50 ohm ter mination. 3. the output(s) may be ac-coupled to the cdr/receiver using a good high frequency capacitor. 4. if an output is connected single- ended to the r eceiver , the unused output m ust be ter minated in 50 ohms. if a single output is ac- coupled to the r eceiver , the unused output must be ac- coupled to a 50 ohm ter m ination. 5. package bottom must be attached to pcb gr ound using conductive epoxy or solder . dc servo (described in an2) note 5 optional loss of signal circuit
CX60083-15/-2a, 10 gbps high gain limiting amplifier rev. v6, 12 apr 2002. information provided in this data sheet is subject to change without notice. pg. 9 of 14 mindspeed technologies, inc. CX60083 package pin description figure 7 illustrates the pin number versus function configuration. table 6 lists the pin assignments and function names. figure 8 illustrates the package pin dimensions. figure 7. CX60083 pin configuration (tqfp package) 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 10g post-amp CX60083 vee vth vee gnd gnd gnd datainn datainp vthcap vee gnd gnd dataoutn dataoutp gnd vee top view offoutp offoutn gnd gnd gnd offinp offinn gnd v ee gnd losout losres pkdetout pkdetdc gnd v ee table 6. package pin assignments package pin signal 2 vthcap 4 datainp 5 datainn 7 vth 10 offinn 11 offinp 15 offoutp 16 offoutn 20 dataoutn 21 dataoutp 27 pkdetdc 28 pkdetout 29 losres 30 los 1, 8, 17, 24, 25, 32 vee 3, 6, 9, 12, 13, 14, 18, 19, 22, 23, 26, 31 gnd ep gnd
CX60083-15/-2a, 10 gbps high gain limiting amplifier rev. v6, 12 apr 2002. information provided in this data sheet is subject to change without notice. pg. 10 of 14 mindspeed technologies, inc. figure 8. CX60083 package dimensions note: all dimensions are in millimeters. bottom view 2.54 +/- 0.13 dia. exposed heatsink c 0.50 +/- .05 x 45 degree top view pin 1 id. 0.50+/-0.05 d d1 -d- e1 e -e- -b- side view detail x r1 theta 1 12 degrees typ. r gage plane 0.25 seating plane l theta e coplanarity ccc - c - -c- a2 a b a1 (standoff) detail x
CX60083-15/-2a, 10 gbps high gain limiting amplifier rev. v6, 12 apr 2002. information provided in this data sheet is subject to change without notice. pg. 11 of 14 mindspeed technologies, inc. CX60083 die information and pad configuration description table 7. die information item value item value product availability die in waffle pack backside bias most positive potential (0v) using conductive epoxy process technology gaas bond pad metalization au die thickness 178 13 m pad pitch 150 m (1) die size 1900 m by 1750 m pad size 120 m x 120 m die passivation silicon nitride opening 93 m x 93 m (2) die backside material gaas note 1: others as indicated below. note 2: other pad size indicated below. figure 9. CX60083 die pad configuration drawing gnd gnd gnd gnd vthcap vth datainp datainn vee dataoutp 243 m 543 m 805 m 938 m 243 m 1200 m 1118 m 1350 m 1593 m -78.5 m vee gnd gnd gnd gnd gnd gnd vee vee dataoutn offinn offinp offoutp n/c offoutn n/c 393 m 625 m 1500 m 1743 m CX60083 los out los res pkdet out pkdet dc -78.5 m 0.0 0.0 543 m 300 m note: pad sizes show exposed metal area only.
CX60083-15/-2a, 10 gbps high gain limiting amplifier rev. v6, 12 apr 2002. information provided in this data sheet is subject to change without notice. pg. 12 of 14 mindspeed technologies, inc. ordering information name number package data 10 gbps packaged limiting amplifier CX60083-15 32-terminal edquad tqfp 10 gbps limiting amplifier die CX60083-2a die in waffle pack revision history revision date comments cla10_rev1_2 10/13/99 cla10 revisions cx8610la_rev1 1/20/00 original cx8610la issue CX60083 2/1/00 original CX60083 issue; added functional description text CX60083v2a 2/18/00 added illustrations and supporting text to functional description CX60083v2b 2/10/00 reorganized sequence of functional description and specification tables; added system block diagram CX60083v2c 5/8/00 transferred descriptive text from note 2 in table 3, rf electrical specifications to paragraph following tabl e CX60083v2d 5/12/00 internal document CX60083v2e 6/19/00 changed header and footer text; performed qa check and edits; edited figure 1, system block diagram CX60083v2f 8/8/00 modified table 1 CX60083v2g 9/15/00 added figure 3 CX60083v3 11/28/00 technical edits CX60083v4 02/26/01 technical edits CX60083v4a 03/12/01 made CX60083?15p from CX60083v4; added review comments; made changes to figure 2, table 2, and table 3 (return losses and bandwidth specifications) CX60083v4b 05/4/01 updated table 2; became figure 2; updated figure and table references; added los assert/de-assert time information; added offset specification note; added in die information; removed p designation; general edits CX60083v5 01/23/02 clarified jitter specification conditions. update supply and output p-p numbers. clarified input sensitivity statements. updated los current sink value. made more explicit the proper connection of the package bottom. add applications diagram. add die information and specifications CX60083v5b 02/20/02 added notes 3 and 7, modified note 2, moved other notes down. added table 7 CX60083v6 04/12/02 corrected pin numbers on applications diagram (fig. 6). added ?2a designator to header. updated sales office information.
CX60083-15/-2a, 10 gbps high gain limiting amplifier rev. v6, 12 apr 2002. information provided in this data sheet is subject to change without notice. pg. 13 of 14 mindspeed technologies, inc. ? 2002, mindspeed technologies, inc. all rights reserved. information in this document is provided in connection with mindspeed? technologies, inc., as a wholly owned subsidiary and the internet infrastructure business of conexant systems, inc., ?mindspeed? products. these materials are provided as a service to its customers and may be used for informational purposes only. mindspeed assumes no responsibility for errors or omissions in these materials. mindspeed may make changes to sp ecifications and product descriptions at any time, without notice. mindspeed makes no commitment to update the information and shall have no responsibil ity whatsoever for conflicts or incompatibilities arising from future changes to its specifications and product descriptions. no license, expressed or implied, by estoppel, or otherwise, to any intellectual property rights is granted by this document. e xcept as provided in mindspeed terms and conditions of sale for such products, mindspeed assumes no liability whatsoever. these materials are provided "as is" without warranty of any kind, either expressed or implied, relating to sale and/or use of mindspeed products including liability or warranties relating to fitness for a particular purpose, consequential or incidental damages, merchantability, or infringement of any patent, copyright, or other intellectual property right. mindspeed further does not warrant the accuracy or completeness of the information, text, graphics or other items contained within these materials. mindspeed shall not be liable for any special, indirect, incidental, or consequential damages, including without limitation, lost revenues or lost profits, which may result from the use of these materials. mindspeed products are not intended for use in medical, life saving, or life sustaining applications. mindspeed customers using or selling mindspeed products for use in such applications do so at their own risk and agree to fully indemnify mindspeed for any damages resulting from such imp roper use or sale. the following are trademarks of mindspeed technologies, inc.: mindspeed?, the symbol m1, and ?build it first??. product names o r services listed in this publication are for identification purposes only, and may be trademarks of third parties. third-party brands and names are the property of their respective owners. for additional disclaimer information, please consult mindspeed's legal information posted at http://www.minds peed.com/ , which is incorporated by reference. reader response: mindspeed strives to produce quality documentation and welcomes your feedback. please send comments and sugges tions to tech.pubs@mindspeed.com . for technical questions, contact your local mindspeed sales office or field applications engineer.
CX60083-15/-2a, 10 gbps high gain limiting amplifier rev. v6, 12 apr 2002. information provided in this data sheet is subject to change without notice. pg. 14 of 14 mindspeed technologies, inc. further information: literature@mindspeed.com (877) 908-5683 (united states) (909) 975-5683 (international) headquarters mindspeed technologies 4000 macarthur boulevard, east tower newport beach, ca 92660 phone: (949) 579-3000 fax: (949) 579-3020 americas us northwest / northwest canada santa clara phone: (408) 423-4500 fax: (408) 249-7113 us north central illinois phone: (630) 799-9300 fax: (630) 799-9325 us south central texas phone: (972) 735-1540 fax: (972) 407-0639 eastern canada ontario phone: (613) 271-2358 fax: (613) 271-2359 us northeast massachusetts phone: (978) 244-7680 fax: (978) 244-6868 us southeast north carolina phone: (919) 858-9110 fax: (919) 858-8669 us florida / south america florida phone: (727) 799-8406 fax: (727) 799-8306 us mid-atlantic pennsylvania phone: (215) 245-2470 fax: (215) 245-2480 europe europe central - germany austria, germany, hungary, poland, romania, russia and switzerland phone: (49) 89 82005 151 fax: (49) 89 82005 150 europe mediterranean - israel greece, israel, italy, portugal and spain phone: (972) 9961-5100 fax: (972) 9957 5166 europe north - uk belgium, denmark, finland, france, ireland, luxembourg, norway, sweden, the netherlands and united kingdom phone: 44 (0) 118 920 9500 fax: 44 (0) 118 920 9595 asia ? pacific p. r. china - central and north australia and new zealand phone: (86-21) 6350-5702 fax: (86-21)-6361-2516 p. r. china - south / hong kong phone: 86-755-2300-420 fax: 86-755-2300-421 asia south - taiwan india, indonesia, malaysia, pakistan, philippines, singapore, taiwan, thailand and vietnam phone: (886-2) 8789-8366 fax: (886-2) 8789-8367 korea phone: 82-2-528-4301 fax: 82-2-528-4305 japan phone: (81-3) 5308 1731 fax: (81-3) 5350-5431 http://www.minds peed.com/

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